Semiconductor component manufacturers are constantly striving to increase the performance of their products while decreasing their cost of manufacture. As those skilled in the art are aware, discrete semiconductor devices and integrated semiconductor devices such as integrated circuits are fabricated from semiconductor wafers which are then singulated or diced to produce semiconductor chips. The semiconductor wafers serve as the substrates from which semiconductor devices are manufactured and provide structural support during their manufacture. For adequate structural support, semiconductor wafers typically have a minimum thickness below which the wafers become warped and easily damaged, especially in a manufacturing environment. However, in many applications the thicker semiconductor wafers significantly degrade device performance. When device performance is an issue, semiconductor component manufacturers use thinned semiconductor wafers to take advantage of the performance benefits they give semiconductor devices even though they increase the cost of manufacturing the semiconductor devices. Techniques for thinning semiconductor wafers include wafer bonding, the use of a rigid tape support system, and back grinding the semiconductor wafer. Wafer bonding techniques greatly increase the cost of semiconductor components and rigid support systems cannot withstand the chemicals and temperatures used in manufacturing semiconductor components. Back grinding techniques are expensive and may damage the semiconductor wafers. FIG. 1 is an isometric view of a prior art semiconductor wafer 10 having a ring support structure 12 formed from a peripheral region 14 of semiconductor wafer 10 using a back grinding technique. Ring support structure 12 comprises a lip 16 having an inner edge 18, an outer edge 20, and a rim surface 22, which rim surface 22 may be a peripheral portion of the back surface of semiconductor wafer 10. A cavity 24 extends into a central region 28 of the body of semiconductor wafer 10 from its back surface and has a boundary surface 30 that is spaced apart from rim surface 22 by a distance 32. Distance 32 is further illustrated in FIG. 2. Thus, cavity 24 is bounded by inner edge 18 and boundary surface 30. A metallization layer 35 is formed on boundary surface 30, inner edge 18, and rim surface 22. After grinding, the portion of metallization layer 35 on rim surface 22 remains.
FIG. 2 is a cross-sectional view of semiconductor wafer 10 having ring support structure 12 taken along section line 2-2 of FIG. 1 after attaching a dicing tape 36 to boundary surface 30 and the portion of metallization layer 35 that is over rim surface 22. What is shown in FIG. 2 is semiconductor wafer 10 having a front or major surface 34, a central region 28, peripheral region 14, lip 16, and cavity 24 extending into semiconductor wafer 10. It should be noted that inner edge 18 is perpendicular to boundary surface 30, rim surface 22 is substantially parallel to boundary surface 30, inner edge 18 is substantially parallel to outer edge 20, and a width 37 of lip 16 is substantially constant. After forming cavity 24, dicing tape 36 is attached to metallization layer 35 that is on rim surface 22 and on boundary surface 30. A drawback of forming lip 16 having inner edge 18 perpendicular to boundary surface 30 is that tape 36 fails to adhere to the portions of metallization layer 35 in the regions where inner edge 18 and boundary surface 30 meet, leaving a gap 38, which decreases the stability of thinned semiconductor wafer 10. In a subsequent step (not shown), a grinding wheel is used to thin lip 16. Another drawback with forming inner edge 18 of lip 16 to be perpendicular to boundary surface 30 is that the grinding wheel simultaneously contacts a large area of a backside metallization layer (not shown) during the step of thinning lip 16, thereby loading up the grinding wheel which impedes the self dressing features of the grinding wheel, increases the grinding current, and creates stresses in semiconductor wafer 10. A method for mitigating these drawbacks has been to use large grit grinding wheels. However, large grit grinding wheels limit the overall height to which the ring support structure can be ground. In addition, the larger grit grinding wheels create larger particles that scratch or damage the back side of semiconductor wafer 10. The larger grit grinding wheels also chip the semiconductor wafers which leads to increased breakage of the semiconductor wafers. Other drawbacks of forming lip 16 having inner edge 18 perpendicular to boundary surface 30 are that it subjects the grinding wheel to increased vibration and wear, and slurry and water become trapped at the corners of ring support structure 12 because they cannot flow around the grinding wheel.
Accordingly, it would be advantageous to have a thinned semiconductor wafer and a method for thinning the semiconductor wafer. It would be of further advantage for the method to be cost efficient to implement.